Prof. Dr. Frank Bellosa, Marius Hillenbrand

Abstract:

With the general availability of Express 3.0 slots in both consumer and server hardware today, more and more I/O devices, such as SSDs and 10G Ethernet NICs, make use of the fast transfer speeds. These devices read and write directly into the main memory using Direct Memory Access (DMA).

As previous publications have shown, memory-intensive applications running in parallel on a multi-core platform may slow each other down because of contention and request reordering in the memory controller. In this work, we analyze interference of high-bandwidth DMA operations with applications running in parallel on the CPU. To generate DMA load, we design and implement a load generator based on NVMe solid-state drives. Our experiments show that high-bandwidth DMA transfers indeed have an influence on memory-intensive applications. Additionally, we analyze last-level cache usage of our DMA loads with performance counters.

BibTex:

@mastersthesis{werling15dmaintrfrncenvme,
  author = {Lukas Werling},
  title = {An Analysis of DMA Interference Using Synthetic Load from an NVMe Device},
  type = {Bachelor Thesis},
  year = 2015,
  month = sep # "18",
  school = {Operating Systems Group, Karlsruhe Institute of Technology (KIT), Germany}
}