Whole Process Persistence with coreboot

  • Type:Bachelor Thesis
  • Date:15.02.2024
  • Supervisor:

    Prof. Dr. Frank Bellosa
    Yussuf Khalil

  • Graduand:Max Streicher
  • Links:PDF
  • Abstract
    This thesis introduces a novel approach to preserving data processed and stored by software applications, addressing the risk posed by computer crashes that can erase the state of applications and lead to data loss. The concept of making applications persistent across system crashes without having to change or recompile them, termed Whole Process Persistence (WPP), is introduced in "Zhuque: Failure is not an Option, it’s an Exception", where the authors introduce a runtime relying on persistent memory in the system [14]. Motivated by the need to ensure data integrity against unexpected system failures, this thesis explores the feasibility of WPP in environments lacking native persistent memory. We developed a system to achieve WPP in the absence of traditional persistent memory solutions, such as Intel’s discontinued Optane brand, by modifying the Linux kernel and firmware of the system [27]. This adaptation enables the saving of PTE, PCB, and virtual memory regions onto an FPGA device accessible via PCIe when the system experiences a power loss.
    By modifying system components, the thesis outlines a methodology for persisting the entire state of a process, aiming to mitigate the impact of crashes. The practical implementation of WPP, tested on a system configured with a 12th generation Intel x86 CPU demonstrates the technical viability of this approach.
    The implementation reveals a significant performance overhead, with synthetic load tests indicating more than 35 times increase in execution time and a worst time slowdown of more than 90% on other processes running on the same machine. Real world benchmarks are depending heavily on how much memory a process allocates, simple redis benchmarks are not experiencing a noticeable slowdown. The process of persisting is able to copy 1.3GB/s of allocated memory to the FPGA device, necessitating the need for an external UPS.
    @bachelorthesis{streicher24coreboot,
      author = {Max Streicher},
      title = {Whole Process Persistence with Coreboot},
      type = {Bachelor Thesis},
      year = 2024,
      month = feb # "15",
      school = {Operating Systems Group, Karlsruhe Institute of Technology (KIT), Germany}
      }