Microkernel Construction
- Type: Lecture
- Chair: System Architecture
- Semester: ST 2009
-
Place:
HS -101 (Bldg. 50.34, UG)
-
Time:
Friday, 11.30 - 13.00
- Start: 24.04.2009
-
Lecturer:
Prof. Dr. Frank Bellosa, Raphael Neider
- SWS: 2
- ECTS: 3
- Lv-No.: 24607
| Date | Speaker | Title | Source |
|---|---|---|---|
24.07.2009 |
Hr. Vaupel |
PR/SM and z/OS (pt. 2) | |
24.07.2009 |
Raphael Neider, Hr. Goebel |
Review | |
17.07.2009 |
Hr. Bornträger |
Hypervisor and z/VM (pt. 2) | |
17.07.2009 |
Hr. Vaupel |
PR/SM and z/OS (pt. 1) | |
10.07.2009 |
Hr. Bornträger |
Hypervisor and z/VM (pt. 1) | |
10.07.2009 |
Hr. Goebel |
System z Architecture | |
03.07.2009 |
Raphael Neider |
Security | |
26.06.2009 |
Raphael Neider |
Interrupt and Exception Handling | |
26.06.2009 |
Raphael Neider |
Local IPC, Interrupt and Exception Handling | |
19.06.2009 |
Raphael Neider |
Small Address Spaces | |
12.06.2009 |
Raphael Neider |
Virtual Memory Mapping | |
05.06.2009 |
Raphael Neider |
Dispatching | |
29.05.2009 |
Raphael Neider |
IPC Implementation | |
22.05.2009 |
Raphael Neider |
IPC Functionality and Interface | |
15.05.2009 |
Raphael Neider |
TCBs and Address Space Layout | |
08.05.2009 |
Raphael Neider |
Threads, System Calls, and Thread Switching | |
01.05.2009 |
Feiertag | ||
25.04.2009 |
Raphael Neider |
Overview, Motivation, Problems |
Contents
| In this lecture, we will present selected design and implementation issues of microkernels with a focus on the L4 microkernel. |
| After motivating microkernels as the foundation of operating systems, we will cover L4's fundamental abstractions (threads and address spaces) and related topics such as kernel entry (syscall), thread switching, and kernel memory management. After that, we will present L4's inter-process communication (IPC) and memory mapping mechanisms, which allow manipulation of the previously discussed abstractions. |
| The following topics outline some of the aspects relevant for implementing general purpose operating systems on top of L4: scheduling, hardware-dependent as well as -independent optimizations (small spaces, local IPC), and provisions for managing I/O devices at user-level. This outline is complemented by a discussion of security in a microkernel-based system, with a focus on controlling data flow (confidentiality). |
| We are proud to announce that this year's lecture will include a series of talks given by three members of the IBM Lab in Böblingen. On 2009-07-10, 2009-07-17, and 2009-07-24 at both 11:30h and 14:00h, the IBM scientists will introduce their audience to the System z mainframes, shedding some light on the overall hard- and software architecture, memory management, load balancing and accounting in the context of “Virtualization on System z”. |
Literature about "Microkernel Construction"
| Author(s) | Title / Source |
| Joshua LeVasseur |
IA32 Condensed for Kernel Developers, System Architecture Group (updated on May 3, 2006) |
| Jochen Liedtke et al. | The Performance of µ-Kernel-Based Systems, Proceedings of the 16th ACM Symposium on Operating System Principles (SOSP), St. Malo, France, October 1997 |
| Jochen Liedtke | On µ-Kernel Construction, Proceedings of the 15th ACM Symposium on Operating System Principles (SOSP), Copper Mountain Resort, CO, December 1995 |
| Jochen Liedtke | Improving IPC by Kernel Design, Proceedings of the 14th ACM Symposium on Operating System Principles (SOSP), Asheville, NC, December 1993 |
| Jochen Liedtke | Toward Real µ-Kernels, Communications of the ACM, 39(9), pp. 70-77, September 1996 |
| Jochen Liedtke et al. | The SawMill Framework for Virtual Memory Diversity, Proceedings of the 6th Australasian Computer Systems Architecture Conference (ACSAC 2001), Bond University, Gold Coast, Queensland, January 29 - February 2, 2001 |
| Intel Corporation | Intel® 64 and IA-32 Architectures Software Developer's Manual, Volume 1: Basic Architecture |
| Intel Corporation | Intel® 64 and IA-32 Architectures Software Developer's Manual, Volume 2A: Instruction Set Reference, A-M |
| Intel Corporation | Intel® 64 and IA-32 Architectures Software Developer's Manual, Volume 2B: Instruction Set Reference, N-Z |
| Intel Corporation | Intel® 64 and IA-32 Architectures Software Developer's Manual, Volume 3A: System Programming Guide, Part 1 |
| Intel Corporation | Intel® 64 and IA-32 Architectures Software Developer's Manual, Volume 3B: System Programming Guide, Part 2 |