Reducing Synchronous Write Latency With a PMEM Write Cache in the Device Mapper Layer
- Typ:Bachelorarbeit
- Datum:13.04.2022
- Betreuung:
Prof. Dr. Frank Bellosa
Lukas Werling - Bearbeitung:Ilia Bozhinov
- Links:PDF
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Abstract
Persistent Memory (PMEM) is a new non-volatile byte-addressable storage technology. While slower than DRAM, it offers significantly higher bandwidth and lower latencies when compared to SSDs. These characteristics make it a good option for improving I/O and in particular synchronous write performance. There have already been many projects working in different layers of the I/O stack aiming to achieve that goal. Most of them, however, fail to utilize the full hardware potential, require non-trivial changes to the kernel or replace existing file systems,
thus resulting in increased complexity and feature duplication.
In this thesis, we present DPWC, a Device Mapper module for the Linux kernel which uses PMEM as a write cache for a regular SSD device. In contrast to many other works in the field, DPWC easily integrates with unmodified existing file systems. We use a fast on-PMEM caching structure inspired by ZIL-PMEM [40] and optimize it specifically for Intel Optane hardware. DPWC achieves significant speed-ups (1.5-2.05x) in most multi-threaded write workloads compared to the standard write cache implementation (dm-writecache) included
in the Linux kernel. Unfortunately, these gains are made at the expense of performance in mixed read and write scenarios, but further optimizations for these cases may be possible.BibTex:
@bachelorthesis{bozhinov22PNEM Write Cache,
author = {Ilia Bozhinov},
title = {Reducing Synchronous Write Latency With a PMEM Write Cache in the Device Mapper Layer},
type = {Bachelor Thesis},
year = 2022,
month = april # "13",
school = {Operating Systems Group, Karlsruhe Institute of Technology (KIT), Germany}
}