Guarded Page Tables on Mips R4600 or an Exercise in Architecture-Dependent Micro Optimization

Abstract:

Guarded Page Tables implement huge sparsely occupied address spaces efficiently and have the advantages of multi-level tables (tree structure, hierarchy, sharing). We present an implementation guarded page tables on the R4600 processor. The paper describes both the architecture-dependent design process of the algorithms and the resulting tool box.

BibTex:

@Article{Liedtke96GuardedPageTables,
  author = {Jochen Liedtke and Kevin Elphinstone},
  title = {Guarded Page Tables on Mips R4600 or an Exercise in Architecture-Dependent Micro Optimization},
  booktitle = {ACM Operating Systems Review},
  volume = {30},
  number = {1},
  pages = {4--15},
  month = jan,
  year = 1996,
}