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Towards Heterogeneous Deterministic Replay for Symmetric Multiprocessors

Towards Heterogeneous Deterministic Replay for Symmetric Multiprocessors
Type:Master Thesis
Date:12.11.2017
Supervisor:

Prof. Dr. Frank Bellosa
Marc Rittinghaus

Graduand:Michael Zangl
Links:PDF

Abstract:

A program can be recorded and then deterministically replayed. This is used for debugging applications and detecting the cause of bugs or errors after they were observed.

During recording, all non-deterministic events are stored for later replay. Upon replay, this allows the program to behave exactly like the recording, down to the instruction level. A detailed analysis of the program is possible during replay. To improve the analysis results, it can be done in a different environment than the recording while preserving the exact instruction flow.

In this master thesis, the ability to extend a heterogeneous record and replay system with multi-core support is evaluated. To make memory race conditions deterministic, a chunk based protocol is evaluated with which a transactional memory is simulated in the hypervisor. No hardware modifications are required for this.

A prototype is implemented based on QEMU that records a virtual machine and replays the recording in an emulator. It is shown that recording on a virtual machine causes low memory overhead and acceptable performance overhead. The scalability of the system is shown to be good for processor numbers that are currently used in virtual machines, although for high numbers of processors this solution does not scale. It is validated that a correct replay is possible in an emulated environment.

Bibtex:

@mastersthesis{zangl17heterogeneousreplay,
  author = {Michael Zangl},
  title = {Towards Heterogeneous Deterministic Replay for Symmetric Multiprocessors},
  type = {Master Thesis},
  year = 2017,
  month = nov # "12",
  school = {Operating Systems Group, Karlsruhe Institute of Technology (KIT), Germany}
}